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? semiconductor components industries, llc, 2011 may, 2011 ? rev. 4 1 publication order number: ncp4586/d ncp4586 150 ma, low noise, low dropout regulator the ncp4586 is a cmos 150 ma low dropout linear with low noise, high ripple rejection, low dropout, high output voltage accuracy and low supply current. the device is available in three configurations: enable high, enable low and enable high plus auto ? discharge. small packages allow mounting on high density pcbs. this is an excellent general purpose regulator, well suited to many applications. features ? operating input voltage range: 1.7 v to 6.5 v ? output voltage range: 1.2 to 5.0 v (available in 0.1 v steps) ? very low dropout: 320 mv typ. at 150 ma ? 1% output voltage accuracy (v out > 2 v, t j = 25 c) ? high psrr: 80 db at 1 khz ? current fold back protection ? stable with a 0.47 f ceramic capacitors ? available in 1.0 x 1.0 udfn, sc ? 82ab and sot23 ? 5 package ? these are pb ? free devices typical applications ? battery powered equipment ? portable communication equipment ? cameras, mp3 players and camcorder ? high stability voltage reference vin vout ce gnd c1 c2 470 n 470 n vin vout ncp4586x figure 1. typical application schematic http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 15 of this data sheet. ordering information udfn4 case 517br xx, xxx= specific product code mm = lot number marking diagrams sc ? 82ab case 419c xx mm 1 1 xx mm 1 sot ? 23 ? 5 case 1212 xxx mm
ncp4586 http://onsemi.com 2 current limit vin gnd vref ce vout ncp4586lxxxxxxxx current limit vin gn d vref ce vou t ncp4586hxxxxxxxx current limit vin gnd vref ce vout ncp4586dxxxxxxxx figure 2. simplified schematic block diagram pin function description pin no. udfn4 pin no. sc82 ? ab pin no. sot23 ? 5 pin name description 4 4 1 vin input pin 2 2 2 gnd ground 3 1 3 ce /ce chip enable pin (?l? active / ?h? active) 1 3 5 vout output pin ? ? 4 nc no connection
ncp4586 http://onsemi.com 3 absolute maximum ratings rating symbol value unit input voltage (note 1) v in 7 v output voltage v out ? 0.3 to v in + 0.3 v chip enable input v ce ? 0.3 to 7 v output current i out 200 ma power dissipation udfn4 p d 400 mw power dissipation sc ? 82ab 380 power dissipation sot23 ? 5 420 maximum junction temperature t j(max) +150 c operating ambient temperature t a ? 40 to +85 c storage temperature t stg ? 55 to +125 c esd capability, human body model (note 2) esd hbm 2000 v esd capability, machine model (note 2) esd mm 200 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. refer to electrical characteristis and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (eia/jesd22 ? a114) esd machine model tested per aec ? q100 ? 003 (eia/jesd22 ? a115) latchup current maximum rating tested per jedec standard: jesd78. thermal characteristics rating symbol value unit thermal characteristics, udfn4 thermal resistance, junction ? to ? air r ja 250 c/w thermal characteristics, sot23 ? 5 thermal resistance, junction ? to ? air r ja 238 c/w thermal characteristics, sc 82ab thermal resistance, junction ? to ? air r ja 263 c/w
ncp4586 http://onsemi.com 4 electrical characteristics ? 40 c t a 85 c; v in = v out(nom) + 1 v or 2.5 v, whichever is greater; i out = 1 ma, c in = c out = 0.47 f, unless otherwise noted. typical values are at t a = +25 c. parameter test conditions symbol min typ max unit operating input voltage v in 1.7 6.5 v output voltage t a = +25 c v out > 2 v v out x0.99 x1.01 v v out 2 v ? 20 20 mv ? 40 c t a 85 c v out > 2 v x0.985 x1.015 v v out 2 v ? 30 30 mv output voltage temp. coefficient t a = ? 40 to 85 c 20 ppm/ c line regulation v in = v out + 0.5 v to 5 v line reg 0.02 0.10 %/v load regulation i out = 1 ma to 150 ma load reg 10 30 mv dropout voltage i out = 150 ma 1.2 v v out < 1.5 v v do 0.67 1.00 v 1.5 v v out < 1.7 v 0.54 0.81 1.7 v v out < 2.0 v 0.46 0.68 2.0 v v out < 2.5 v 0.41 0.60 2.5 v v out < 4.0 v 0.32 0.51 4.0 v v out 0.24 0.37 output current i out 150 ma short current limit v out = 0 v i sc 40 ma quiescent current i out = 0 ma i q 38 58 a standby current v ce = v in (l version), v ce = 0 v(h and d version), t a = 25 c i stb 0.1 1 a ce /ce pin threshold voltage ce / ce input voltage ?h? v ceh 1.0 v ce / ce input voltage ?l? v cel 0.4 ce pull down current h and d version i pd 0.4 a power supply rejection ratio v in = v out + 1 v or 3.0 v whichever is higher, i out = 30 ma, f = 1 khz psrr 80 db output noise voltage v out = 1.2 v, i out = 30 ma, f = 10 hz to 100 khz v n 30 v rms low output n ? ch tr. on resistance d version only, v in = 4 v, v ce = 0 v r low 30
ncp4586 http://onsemi.com 5 typical characteristics figure 3. output voltage vs. output current 1.2 v version (t a = 25 c) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 100 200 300 400 500 i out (ma) v out (v) v in = 2.2 v 6.5 v 6.0 v 3.6 v 4.2 v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 100 200 300 400 500 v out (v) figure 4. output voltage vs. output current 2.8 v version (t a = 25 c) i out (ma) figure 5. output voltage vs. output current 5.0 v version (t a = 25 c) figure 6. dropout voltage vs. output current 1.2 v version figure 7. dropout voltage vs. output current 2.8 v version 6.0 v 4.2 v 3.8 v v in = 6.5 v 0 1 2 3 4 5 6 i out (ma) v out (v) 0 100 200 300 400 500 v in = 6.5 v 6.0 v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0 100 200 300 400 500 i out (ma) v do (v) 85 c 25 c ? 40 c 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 i out (ma) v do (v) 0 100 200 300 400 500 figure 8. dropout voltage vs. output current 5.0 v version 85 c 25 c ? 40 c 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0 25 50 75 100 125 150 85 c 25 c ? 40 c i out (ma) v do (v)
ncp4586 http://onsemi.com 6 typical characteristics figure 9. output voltage vs. temperature, 1.2 v version 1.15 1.17 1.19 1.21 1.23 1.25 ? 40 ? 200 20406080 t j , junction temperature ( c) v out (v) v in = 2.2 v 2.75 2.77 2.79 2.81 2.83 2.85 figure 10. output voltage vs. temperature, 2.8 v version v out (v) t j , junction temperature ( c) v in = 3.8 v figure 11. output voltage vs. temperature, 5.0 v version figure 12. supply current vs. input voltage, 1.2 v version ? 40 ? 200 20406080 4.95 4.96 4.97 4.98 4.99 5.00 5.01 5.02 5.03 5.04 5.05 ? 40 ? 200 20406080 t j , junction temperature ( c) v out (v) v in = 6.0 v 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 0123456 v in (v) i in ( a) 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 0123456 i in ( a) v in (v) 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 0123456 v in (v) i in ( a) figure 13. supply current vs. input voltage, 5.0 v version figure 14. supply current vs. input voltage, 2.8 v version
ncp4586 http://onsemi.com 7 typical characteristics 30.0 31.0 32.0 33.0 34.0 35.0 36.0 37.0 38.0 39.0 40.0 ? 40 ? 20 0 20 40 60 80 figure 15. supply current vs. temperature, 1.2 v version i in ( a) t j , junction temperature ( c) v in = 2.2 v 30.0 31.0 32.0 33.0 34.0 35.0 36.0 37.0 38.0 39.0 40.0 ? 40 ? 200 20406080 t j , junction temperature ( c) i in ( a) v in = 3.8 v figure 16. supply current vs. temperature, 2.8 v version 35 36 37 38 39 40 41 42 43 44 45 ? 40 ? 20 0 20 40 60 80 figure 17. supply current vs. temperature, 5.0 v version t j , junction temperature ( c) v in = 6.0 v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 01234567 figure 18. output voltage vs. input voltage, 1.2 v version v in (v) v out (v) i out = 50 ma 1 ma 30 ma 0.0 0.5 1.0 1.5 2.0 2.5 3.0 01234567 v out (v) v in (v) figure 19. output voltage vs. input voltage, 2.8 v version i in ( a) 1 ma i out = 50 ma 30 ma 0.0 1.0 2.0 3.0 4.0 5.0 6.0 01234567 v out (v) v in (v) figure 20. output voltage vs. input voltage, 5.0 v version 1 ma i out = 50 ma 30 ma
ncp4586 http://onsemi.com 8 typical characteristics 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 100 1000 figure 21. psrr, 1.2 v version psrr (db) frequency (khz) 1 ma i out = 150 ma 30 ma 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 100 1000 1 ma i out = 150 ma 30 ma frequency (khz) figure 22. psrr, 2.8 v version 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 100 1000 1 ma i out = 150 ma 30 ma psrr (db) frequency (khz) figure 23. psrr, 5.0 v version 0.01 0.1 1 10 100 1000 frequency (khz) psrr (db) v n ( v rms / hz ) figure 24. output voltage noise, 1.2 v version 0.01 0.1 1 10 100 1000 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 v n ( v rms / hz ) frequency (khz) figure 25. output voltage noise, 2.8 v version 0.01 0.1 1 10 100 1000 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 frequency (khz) v n ( v rms / hz ) figure 26. output voltage noise, 5.0 v version
ncp4586 http://onsemi.com 9 typical characteristics figure 27. line transients, 1.2 v version, t r = t f = 5 s, i out = 30 ma 0 102030405060708090100 v out (v) t ( s) 1.205 1.200 1.195 1.190 figure 28. line transients, 2.8 v version, t r = t f = 5 s, i out = 30 ma 0 102030405060708090100 4 3 2 1 v out (v) 2.805 v in (v) 2.800 2.795 2.790 6 v in (v) 5 4 3 t ( s) figure 29. line transients, 5.0 v version, t r = t f = 5 s, i out = 30 ma 0 102030405060708090100 5.005 5.000 4.995 4.990 v out (v) v in (v) t ( s) 7 6 5 4
ncp4586 http://onsemi.com 10 typical characteristics figure 30. load transients, 1.2 v version, i out = 50 ? 100 ma, t r = t f = 0.5 s, v in = 2.2 v 0 102030405060708090100 v out (v) 1.23 200 i out (ma) 1.22 1.21 1.20 1.19 1.18 150 100 50 0 t ( s) figure 31. load transients, 2.8 v version, i out = 50 ? 100 ma, t r = t f = 0.5 s, v in = 3.8 v 0 102030405060708090100 v out (v) i out (ma) t ( s) 2.83 200 150 100 50 0 2.82 2.81 2.80 2.79 2.78 figure 32. load transients, 5.0 v version, i out = 50 ? 100 ma, t r = t f = 0.5 s, v in = 6.0 v 0 102030405060708090100 v out (v) i out (ma) t ( s) 5.03 200 150 100 50 0 5.02 5.01 4.99 4.98
ncp4586 http://onsemi.com 11 typical characteristics figure 33. load transients, 1.2 v version, i out = 1 ? 150 ma, t r = t f = 0.5 s, v in = 2.2 v 0 102030405060708090100 v out (v) i out (ma) t ( s) 1.30 200 1.25 1.20 1.15 1.10 1.05 150 100 50 0 figure 34. load transients, 2.8 v version, i out = 1 ? 150 ma, t r = t f = 0.5 s, v in = 3.8 v 0 102030405060708090100 v out (v) i out (ma) t ( s) 2.90 200 150 100 50 0 2.85 2.80 2.75 2.70 2.65 figure 35. load transients, 5.0 v version, i out = 1 ? 150 ma, t r = t f = 0.5 s, v in = 6.0 v 0 102030405060708090100 v out (v) i out (ma) 5.10 200 150 100 50 0 t ( s) 5.05 5.00 4.95 4.90 4.85
ncp4586 http://onsemi.com 12 typical characteristics figure 36. start ? up, 1.2 v version, v in = 2.2 v 0 2 4 6 8 101214161820 v out (v) v ce (v) t ( s) 2.0 4 1.5 1.0 0.5 0.0 ? 0.5 3 2 1 0 i out = 1 ma chip enable i out = 150 ma figure 37. start ? up, 2.8 v version, v in = 3.8 v 02468101214161820 v out (v) v ce (v) t ( s) 4 5 3 2 1 0 ? 1 i out = 1 ma chip enable i out = 150 ma figure 38. start ? up, 5.0 v version, v in = 6.0 v 0 5 10 15 20 25 30 35 40 45 50 4 3 2 1 v out (v) v ce (v) t ( s) 8 10 6 4 2 0 ? 2 8 6 4 2 0 i out = 1 ma chip enable i out = 150 ma
ncp4586 http://onsemi.com 13 typical characteristics figure 39. shutdown, 1.2 v version d, v in = 2.2 v 0 102030405060708090100 v out (v) v ce (v) t ( s) 2.0 4 1.5 1.0 0.5 0.0 ? 0.5 3 2 1 0 i out = 1 ma chip enable i out = 150 ma i out = 30 ma figure 40. shutdown, 2.8 v version d, v in = 3.8 v 0 102030405060708090100 i out = 1 ma chip enable i out = 150 ma i out = 30 ma v out (v) v ce (v) t ( s) 2.0 5 1.5 1.0 0.5 0.0 ? 0.5 figure 41. shutdown, 5.0 v version d, v in = 6.0 v 0 102030405060708090100 v out (v) v ce (v) 8 10 6 4 2 0 ? 2 4 3 2 1 8 6 4 2 0 t ( s) i out = 1 ma chip enable i out = 150 ma i out = 30 ma
ncp4586 http://onsemi.com 14 application information a typical application circuit for ncp4586 series is shown in figure 42. vin vout ce gnd c1 c2 470n 470n vin vout ncp4586x figure 42. typical application schematic input decoupling capacitor (c1) a 470 nf ceramic input decoupling capacitor should be connected as close as possible to the input and ground pin of the ncp4586. higher values and lower esr improves line transient response. output decoupling capacitor (c2) a 470 nf or larger ceramic output decoupling capacitor is sufficient to achieve stable operation of the ic. if a tantalum capacitor is used, and its esr is high, loop oscillation may result. the capacitors should be connected as close as possible to the output and ground pins. larger values and lower esr improves dynamic parameters. enable operation the enable pin ce or ce may be used for turning the regulator on and off. control polarity is dependent on version of ic. active high or low versions are available; please see the ordering information table. the enable pin has an internal pull down current source for versions h and d. if the enable function is not needed connect the ce pin to ground for version l or connect the ce pin to vin for versions h and d. output discharger the d version includes a transistor between vout and gnd that is used for faster discharging of the output capacitor. this function is activated when the ic goes into disable mode. thermal as power across the ic increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and also the ambient temperature affect the rate of temperature rise for the part. that is to say, when the device has good thermal conductivity through the pcb, the junction temperature will be relatively low with high power dissipation applications. pcb layout make vin and gnd line sufficient. if their impedance is high, noise pickup or unstable operation may result. connect capacitors c1 and c2 as close as possible to the ic, and make wiring as short as possible.
ncp4586 http://onsemi.com 15 ordering information device nominal output voltage description marking package shipping ? ncp4586dsq12t1g 1.2 v enable high, auto discharge la sc82ab (pb ? free) 3000 / tape & reel ncp4586dsq18t1g 1.8 v lg ncp4586dsq28t1g 2.8 v mh ncp4586dsq30t1g 3.0 v na NCP4586DSQ33T1G 3.3 v nd ncp4586dsq50t1g 5.0 v qa ncp4586dmu12tcg 1.2 v va udfn4 (pb ? free) 10000 / tape & reel ncp4586dmu14tcg 1.4 v vc ncp4586dmu15tcg 1.5 v vd ncp4586dmu18tcg 1.8 v vg ncp4586dmu25tcg 2.5 v vq ncp4586dmu28tcg 2.8 v vt ncp4586dmu30tcg 3.0 v vw ncp4586dmu33tcg 3.3 v vz ncp4586dmu50tcg 5.0 v ws ncp4586dsn12t1g 1.2 v h2a sot ? 23 ? 5 (pb ? free) 3000 / tape & reel ncp4586dsn18t1g 1.8 v h2g ncp4586dsn28t1g 2.8 v h2t ncp4586dsn30t1g 3.0 v h2w ncp4586dsn33t1g 3.3 v h2z ncp4586dsn50t1g 5.0 v j2s ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. note: to order other package and voltage variants, please contact your on semiconductor sales representative.
ncp4586 http://onsemi.com 16 package dimensions udfn4 1.0x1.0, 0.65p case 517br ? 01 issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.20 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. a b e d d2 bottom view b e 4x note 3 2x 0.05 c pin one reference top view 2x 0.05 c a a1 (a3) 0.05 c 0.05 c c seating plane side view l 3x 1 2 dim min max millimeters a ??? 0.60 a1 0.00 0.05 a3 0.10 ref b 0.20 0.30 d 1.00 bsc d2 0.43 0.53 e 1.00 bsc e 0.65 bsc l 0.20 0.30 l2 0.27 0.37 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. mounting footprint* detail a 1.30 0.30 0.53 4x dimensions: millimeters 0.52 2x recommended package outline l2 detail a l3 detail b l3 0.02 0.12 detail b note 4 e/2 d2 45 a m 0.05 b c 4 3 0.65 pitch 4x typ c 0.18 0.23 4x 0.43 3x 0.10 3x
ncp4586 http://onsemi.com 17 package dimensions sc ? 82ab case 419c ? 02 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. 419c ? 01 obsolete. new standard is 419c ? 02. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. 12 3 a g s n j k 4 d 3 pl b f l c h 0.05 (0.002) dim min max min max inches millimeters a 1.8 2.2 0.071 0.087 b 1.15 1.35 0.045 0.053 c 0.8 1.1 0.031 0.043 d 0.2 0.4 0.008 0.016 f 0.3 0.5 0.012 0.020 g 1.1 1.5 0.043 0.059 h 0.0 0.1 0.000 0.004 j 0.10 0.26 0.004 0.010 k 0.1 ??? 0.004 ??? l 0.05 bsc 0.002 bsc n 0.2 ref 0.008 ref s 1.8 2.4 0.07 0.09 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 1.30 0.0512 mm inches scale 10:1 0.65 0.026 1.90 0.075 0.90 0.035 0.70 0.028 0.95 0.037
ncp4586 http://onsemi.com 18 package dimensions sot ? 23 5 ? lead case 1212 ? 01 issue a dim min max millimeters a1 0.00 0.10 a2 1.00 1.30 b 0.30 0.50 c 0.10 0.25 d 2.70 3.10 e 2.50 3.10 e1 1.50 1.80 e 0.95 bsc l l1 0.45 0.75 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimensions: millimeters. 3. datum c is the seating plane. a 1 5 23 4 d e1 b l1 e e c m 0.10 c s b s a b 5x a2 a1 s 0.05 c l 0.20 --- *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.95 dimensions: millimeters pitch 5x 3.30 0.56 5x 0.85 a --- 1.45 recommended a on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ncp4586/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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